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Junior ASIC Engineer
DATE OF EXPIRY 2013-10-29
 
Location: Taipei, Taiwan
 
E-MAIL: jobs@frescologic.com
 

Overview:
Fresco Logic is a global fabless semiconductor company providing advanced solutions that deliver highly-efficient connectivity such as USB 3.0 for next-generation consumer electronics, personal computing, storage and mobile devices. As a leader in USB 3.0, also known as SuperSpeed USB, Fresco Logic provides a comprehensive offering of silicon, software and reference designs to help system designers accelerate the adoption of USB3.0

Qualifications:
Candidate must have a Bachelor’s degree and 0-5 years of work experience or relevant academic course or research in ASIC digital design and/or verification. Candidate should have an understanding of good digital design and verification practices. He/she should be able to take a specification, write RTL, and write simulation vectors to verify their RTL. Experience using System Verilog (SV) and at least one prior RTL design is a plus. Familiarity in PCIe, USB2, USB3, or DMA engines is a big plus.
 
Required Expertise and Work Experience:
  1. Demonstrate a working knowledge of SV or similar verification language
  2. Demonstrate a working knowledge of Verilog
  3. Must be able to write technical documents such as microarchitecture specs, test plans, and register definitions.
  4. Experience with Cadence NC or Synopsys VCS is a plus
  5. Experience with high speed serial protocols is a plus (USB3, PCIe, Ethernet, etc.)
Interpersonal Skills
  1. Enthusiastic, self-motivated, and flexible with strong inter-personal skills.
  2. Enjoys a fast paced and dynamic environment.
  3. Ability to work on very challenging tasks and meet customer's deadlines
  4. Good communication skills, oral and written.
 
 
 
 
 
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